In recent years, low power and high speed are required for semiconductor integrator circuits, and drastic increase in density and high densification are required, and multilayered structures of circuits and miniaturization of wiring patters by e.g. copper or aluminum are in progress.
With respect to the multilayered structures of circuits, the irregularities on the surface of a circuit formed by e.g. exposure, has an influence over a circuit to be formed thereon in a multilayered structure. This influence tends to be significant in the wiring pattern at the upper layer, and makes it difficult to satisfy both resolution and depth of focus in photolithography, or causes a defect such as breakage of wire of the circuit.
Accordingly, an insulating film formed on a semiconductor substrate is planarized by chemical mechanical polishing (CMP), and a new wiring is optically exposed by photolithography to form a circuit thereon, and such an operation is repeatedly carried out to laminate circuits.
In this CMP, the irregularities on the surface to be polished have to be flattened by polishing in as short time as possible and at the same time, defects on the semiconductor substrate surface at the time of polishing, such as cracks, scratches or film peeling, which cause the irregularities on the surface to be polished, have to be suppressed as far as possible.
On the other hand, by miniaturization of processing line width by miniaturization of the wiring pattern by using e.g. copper or aluminum, due to narrowed space between wirings, the capacitance between wirings tends to increase, the signal delay time tends to be long, and the increase in speed of a semiconductor integrated circuit will be inhibited. Thus, insulation between wirings is carried out by tightly filling e.g. the space between such miniaturized wirings with a material having a low dielectric constant.
Heretofore, as a material of an insulating film, inorganic material such as a SiO2 film having a relative dielectric constant of about 4.2 has been used (e.g. JP-A-06-216096 (paragraphs 0172, 0173), JP-A-10-94955 (paragraph 0028), JP-A-2000-79564 (paragraph 0011)). However, in recent years, due to further increase in density of wirings, an insulating film having a dielectric constant lower than ever is required.
Such an insulating film, an organic silicon material film having a C—Si bond and a Si—O bond is proposed. Such an organic silicon material film having an C—Si bond and a Si—O bond can not be said to have high mechanical strength as compared with a conventional SiO2 film, however, it generally has a low dielectric constant, comparable in thermal stability and has characteristics exceeding a conventional SiO2 film in many points such as a property to form a flat surface at the time of film formation, and a characteristic to fill the gap at the time of film formation.
When such an organic silicon material having a C—Si bond and a Si—O bond, which is used as an insulating film for example, is polished with a conventional polishing compound comprising particles of e.g. silica, alumina or ceria as abrasive grains and water as a main medium, if polishing is carried out under the same pressure (2.8×104 to 3.4×104 Pa) as in a case of polishing a conventional insulating film made of an inorganic material so as to obtain a high polishing speed (polishing rate), defects such as cracks, scratches or film peeling, which may cause the irregularities on the organic silicon material film having a C—Si bond and a Si—O bond in some cases. This is considered to be a phenomenon resulting from low mechanical strength of the organic silicon material film having a C—Si bond and a Si—O bond as compared with an inorganic material insulating film. Further, if the pressure during polishing is decreased to prevent such defects, no adequate polishing speed could be obtained.
Further, in the case of ceria which is used as widely as silica as abrasive grains for a conventional SiO2 film, the polishing speed was found to significantly decrease when used for polishing the organic silicon material film having a C—Si bond and a Si—O bond.
As mentioned above, an appropriate polishing compound has not been found for an insulating film comprising an organic silicon material having a C—Si bond and a Si—O bond, which is a bottleneck in effective production of a multilayered semiconductor integrated circuit.